As semiconductor technologies continue to advance, the persistent trend of transistor miniaturization introduces significant design challenges, particularly regarding power dissipation. Among the most impacted components are flip-flops—essential building blocks in digital circuits—whose energy efficiency becomes increasingly critical in ultra-scaled technologies. To address this, engineers have explored power-saving techniques such as selective circuit deactivation during idle periods. While effective in reducing power consumption, such methods often come at the cost of data volatility and potential information loss. To mitigate these drawbacks, recent research has focused on the integration of non-volatile elements into conventional flip-flop designs. A promising solution lies in the use of Magnetoresistive Tunnel Junctions (MTJs), which offer non-volatility along with high switching speeds and reduced power requirements. MTJ-based designs enable circuits to retain data even when powered down, thereby eliminating the need for constant power supply while ensuring data integrity. This study proposes a non-volatile flip-flop architecture leveraging MTJ technology, demonstrating marked improvements over conventional volatile counterparts. Through extensive simulations and comparative analyses, the proposed design achieves substantial gains in key performance metrics: a reduction of up to 54% in write energy, a 5% improvement in clk-to-q delay, and a 17% enhancement in the power-delay product (PDP). These advancements underscore the viability of MTJ-based flip-flops as a robust, energy-efficient alternative for next-generation low-power, high-performance integrated circuits.