Improvement of Genetic Algorithm for Optimizing Routing and Power Consumption in Network on Chip

Document Type : Original Article


1 Faculty of Electrical Engineering, Sahand University of Technology (SUT), Tabriz, Iran

2 Faculty of Computer Science, University of the East, Manila, Philippines

3 Faculty of Electrical and Computer Engineering, Semnan University, Semnan, Iran


Network on Chip (NoC) is a new structure that has attracted attention of researchers in electronics. Performance of routing in network on chip is an important task. Two problems are considered in this paper. First problem is finding an appropriate order for responsibilities of task graph. Position of tasks should be found on communication kip. Second problem is communicating and finding appropriate direction for NoC. Appropriate direction is a direction that contains minimum distance in mapped tasks and uses network bandwidth optimally. It also has less power consumption. In this paper, a combination of genetic algorithm (GA) and ant colony optimization (ACO) is utilized to map cores on NoC optimally. Also proposed algorithm is applied for finding directions on chip. Results show that proposed algorithm can do routing task in NoC well and decrease power consumption.


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